Wafer-Level
Assembly of Heterogeneous Technologies
J.-Q. Lu, A. Jindal,
P.D. Persans, T.S. Cale, and R.J. Gutmann
Interconnect
Rensselaer
Polytechnic Institute,
Keywords:
Wafer-level
hyper-integration, wafer bonding, GaAs- and InP-Si integration, electronic and
photonic packaging
Abstract
A technology platform
demonstrating wafer-level assembly of heterogeneous technologies based upon
vertical wafer stacking is described. This platform offers the potential for
low-cost assembly of various compound semiconductor circuits with silicon ICs
for wide bandwidth optoelectronic and space-conservative packaging
applications. Process development results obtained to date are presented, and
approaches to heterogeneous integration using this novel technology platform
are outlined.